The present invention is directed to communication signal driver apparatuses, and especially to communication signal driver apparatuses that handle high-speed signal traffic between components.
High speed chip-to-chip signaling is a significant bottleneck in the design of systems such as motherboards, optical transmission links, intelligent network hubs, routers and other systems. Some standards have been established to apply to high speed signal handling applications including, for example, low voltage differential signaling (LVDS) and positive emitter-coupled logic (PECL). These standards are designed to achieve high-speed signal handling with low power dissipation and low electromagnetic interference (EMI).
Inter-chip high-speed communication is limited by the performance of driver and receiver circuits at the interface of communicating chips. In particular, it is important for driver apparatuses to exhibit high-speed signal handling as well as low power dissipation while operating using low supply voltages. Other desirable attributes for a driver apparatus are scalability and variability of the apparatus for satisfying various standards to which driver apparatuses may be required to adhere.
In a communication system, the driver speed is not only limited by the external load that is driven, but also by the structure of the circuitry used to drive the external loads. In its preferred embodiment, the present invention is an apparatus, such as a driver circuit, for conveying a communication signal. The apparatus is preferably constructed to include a switching circuit, a follower circuit that follows the switching circuit and a control circuit. The control circuit provides a feedback signal from the follower circuit to the switching circuit to control at least one parameter associated with operation of the switching circuit. The switching circuit is preferably constructed as a differential switching stage with resistive loads. A bias current through the resistive loads establishes the required differential voltage at the output of the apparatus. The switching circuit also controls the common mode voltage at the output of the apparatus. The follower circuit translates the differential voltage generated by the switching circuit to the output of the apparatus. The control circuit senses the common mode voltage at the output of the apparatus and provides an amplified error signal to the switching circuit.
This arrangement provides for high-speed operation because of low output impedance of the follower circuit (i.e., the output stage of the apparatus) and because there is no switching effected in the output stage of the apparatus. Because the entire apparatus may be advantageously constructed with minimal stacking of devices and with low voltage drops within the circuitry, the apparatus is particularly well suited for low voltage applications. Further, since the output stage (i.e., the follower circuit) includes no switching devices, there is no requirement for large currents in the follower circuit for high speed operation. The preferred output stage (i.e., follower circuit) construction also facilitates either high or low output common-mode voltage operation. Circuit parameters and particular components in the apparatus may easily be varied to satisfy particular requirements for various standards including, for example, output differential voltage, speed, and power dissipation.
An apparatus for effecting high speed switching of a communication signal between a first component and a second component includes: (a) a switching circuit configured for receiving the communication signal from the first component; the switching circuit includes a plurality of switch elements responding to the communication signal to produce an interim signal that is substantially a model of the communication signal; (b) a follower circuit having an input locus coupled with the switching circuit for receiving the interim signal; the follower circuit has an output locus configured for presenting an output signal that is substantially duplicating the interim signal; and (c) a control circuit coupling the follower circuit with the switching circuit; the control circuit receives a feedback signal from the follower circuit that is representative of the output signal; the control circuit responds to the feedback signal to effect operation of the switching circuit to control at least one first parameter relating to the interim signal.
It is therefore an object of the present invention to provide an apparatus for conveying a signal that exhibits high-speed signal handling and low power dissipation.
It is a further object of the present invention to provide an apparatus for conveying a signal that can operate using low supply voltages.
It is yet a further object of the present invention to provide an apparatus for conveying a signal that exhibits scalability and variability for satisfying various standards.